Introduction
The following provides a bit more detail than is available on the .NET MicroFramework MSDN pages
Some aspects of using the SPI port are specific to the Netduino implementation.
The information provided below is accurate for Netduino firmware 4.0.1(update6).
Master or Slave
Some aspects of the SPI implementation are incomplete. One example of this is that the SPI port can not be used as a slave device. The hardware supports this function but not the .NETMF port to ARM processors like the one used in Netduino.
Getting started
To use an SPI port you first create an SPI.configuration object using the constructor:
public SPI.Configuration (
Pin ChipSelect_Port,
bool ChipSelect_ActiveState,
UInt16 ChipSelect_SetupTime,
UInt16 ChipSelect_HoldTime,
bool Clock_IdleState,
bool Clock_Edge,
UInt16 Clock_Rate,
SPI_module SPI_mod)
For Example:
SPI.Configuration xSPIConfig;
SPI xspi;
xSPIConfig = new SPI.Configuration(Pins.GPIO_PIN_D10, //Chip Select pin
false, //Chip Select Active State
0, //Chip Select Setup Time
0, //Chip Select Hold Time
true, //Clock Idle State
true, //Clock Edge
1000, //Clock Rate (kHz)
SPI.SPI_module.SPI1);//SPI Module
xspi = new SPI(xSPIConfig);
ChipSelect_Port
Any GPIO port can be used for chip select except for GPIO_PIN_D4 and D11,12 and 13. D4 is a special case because it is the only pin that can be used as an NSS (Slave select) when the SPI module is used in slave mode. Although this functionality is not fully implemented the pin has been reserved for this. This may be implemented in later versions.
D11,12 and 13 are already used by SPI for MISO, MOSI and CLK.
You can also use GPIO_NONE as the chip select. In this case you will need to set the chip select manually using standard outputport commands before each read/write or if you only have one slave you may be able to tie CS permanently to GND (or VCC if active Hi).
Chip select (CS) is also called Slave select (SS).
ChipSelect_ActiveState
To determine the correct value for this refer to the chip datasheet. Look for the timing diagram for SPI transfer. If the CS line is shown as low during a transfer then this should be "false" Another clue is the pin name will be CS or SS with a line over the top. The line means active low. If the pin is called CS without a line then it is active high and this parameter should be true.
ChipSelect_SetupTime
This setting controls the delay between activating chip select and starting clock pulses. A value of 0 (zero) causes a delay of approximately 6-8us depending on the clock rate. The delay in microseconds (us) is = 2x ChipSelect_SetupTime + 6 + (0.5 * SPI_Clock_period). Check the chip datasheet timing diagram for your chip's timing requirements. This delay formula was determined by experiments and measurement.
ChipSelect_HoldTime
This delay is the time after the last clock pulse before chip select is deactivated. Check the chip datasheet timing diagram for your chip's timing requirements. The same formula as above applies to this delay.
Clock_IdleState
Again refer to the timing diagram in your chip's datasheet and determine if SCLK should be low or high before and after CS is activated. If high then this parameter should be true and vice versa.
Clock_Edge
From the timing diagram you should be able to see that the DIN or DOUT signal changes state on one edge of the clock signal and does not change on the other edge of the clock signal.
If the DIN/DOUT is held stable on rising edge then this parameter should be true.
If the DIN/DOUT is held stable on falling edge then this parameter should be false.
Clock_Rate
This parameter is the clock frequency in kHz. Your datasheet will tell you what the max limit for clock frequency is, although it may be shown as a minimum time for the high and low segments or as a minimum period of the clock signal.
For example:
If the spec for SCLK period is a minimum of 500ns then the frequency is 1/period which would be max 2MHz.
If the spec for SCLK Hi and Lo Pulse width is min 100ns period is 200ns min and the CLK would be max 5Mhz.
The Netduino microcontroller does not allow just any clock frequency to be set. The options available are the Master clock frequency of 48MHz divided by 1 to 255. Numbers like 1000 and 2000 will result in 1MHz and 2MHz as expected but 2001 will round up to the next setting which happens to be 2.087mHz.
For the above example, trying to set 5000 will result in 5.333Mhz. The closest you could get would be 4800 or 4.8MHz
SPI_mod
There is only one SPI port available on Netduino so set this to "SPI.SPI_module.SPI1"
There are 2 SPI ports on the microcontroller but the second is dedicated to the microSD slot.
Delay between consecutive transfers
If you look at the ARM microcontroller datasheet you will see there is a control called DLYBCT: Delay Between Consecutive Transfers. That parameter controls the delay between successive bytes (or 16-bits) in a single write operation. In the netduino implementation that parameter is set to zero. There is still a delay between bytes though because the driver waits until the byte has been completely transmitted before transferring the next byte into the transmit data register. This reults isn a short delay between bytes. This delay is not controllable from the .NET MicroFramework SPI class. The delay varies depending on the clock speed.
At 250kHz it is 5.4us and at 4MHz it is 1.6us. It is approximately 1 clock cycle plus 1.3us.